Registriere dich noch heute kostenlos, um Mitglied zu werden! Sobald du angemeldet bist, kannst du auf unserer Seite aktiv teilnehmen, indem du deine eigenen Themen und Beiträge erstellst und dich über deinen eigenen Posteingang mit anderen Mitgliedern unterhalten kannst! Zudem bekommst du Zutritt zu Bereichen, welche für Gäste verwehrt bleiben
Registriere dich noch heute kostenlos, um Mitglied zu werden! Sobald du angemeldet bist, kannst du auf unserer Seite aktiv teilnehmen, indem du deine eigenen Themen und Beiträge erstellst und dich über deinen eigenen Posteingang mit anderen Mitgliedern unterhalten kannst! Zudem bekommst du Zutritt zu Bereichen, welche für Gäste verwehrt bleiben
was bewirkt denn Q3 oder vielmehr was ist der Unterschied zwischen Q1 und Q3 ?
Terminal/Telnet spuckt das raus:Was Leo888 damit sagen wollte ist, deine Syntax stimmt nicht.
Und starte mal ohne "-b" um die volle Ausgabe in der Konsole zu bekommen:
Code:/usr/bin/ ./oscam -r2
Fehler dann hier posten.
opkg update
opkg install libpcsclite1
-O0 optimization for time
-O2 optimization (oscam default)
-O3 optimization (smaller size)
-Os optimization for code size
cc_opts="-ggdb -pipe -ffunction-sections -fdata-sections -funroll-loops -fomit-frame-pointer -fno-schedule-insns"
gcc --target-help
The following options control optimizations:
-O<number> Set optimization level to <number>.
-Ofast Optimize for speed disregarding exact standards compliance.
-Og Optimize for debugging experience rather than speed or size.
-Os Optimize for space rather than speed.
-Oz Optimize for space aggressively rather than speed.
-faggressive-loop-optimizations Aggressively optimize loops using language constraints.
-falign-functions Align the start of functions.
-falign-functions= This option lacks documentation.
-falign-jumps Align labels which are only reached by jumping.
-falign-jumps= This option lacks documentation.
-falign-labels Align all labels.
-falign-labels= This option lacks documentation.
-falign-loops Align the start of loops.
-falign-loops= This option lacks documentation.
-fallocation-dce Tell DCE to remove unused C++ allocations.
-fallow-store-data-races Allow the compiler to introduce new data races on stores.
-fassociative-math Allow optimization for floating-point arithmetic which may change the result of the operation due to rounding.
-fasynchronous-unwind-tables Generate unwind tables that are exact at each instruction boundary.
-fauto-inc-dec Generate auto-inc/dec instructions.
-fbit-tests Use bit tests for sufficiently large switch statements.
-fbranch-count-reg Replace add, compare, branch with branch on count register.
-fbranch-probabilities Use profiling information for branch probabilities.
-fcaller-saves Save registers around function calls.
-fcode-hoisting Enable code hoisting.
-fcombine-stack-adjustments Looks for opportunities to reduce stack adjustments and stack references.
-fcompare-elim Perform comparison elimination after register allocation has finished.
-fconserve-stack Do not perform optimizations increasing noticeably stack usage.
-fcprop-registers Perform a register copy-propagation optimization pass.
-fcrossjumping Perform cross-jumping optimization.
-fcse-follow-jumps When running CSE, follow jumps to their targets.
-fcx-fortran-rules Complex multiplication and division follow Fortran rules.
-fcx-limited-range Omit range reduction step when performing complex division.
-fdce Use the RTL dead code elimination pass.
-fdefer-pop Defer popping functions args from stack until later.
-fdelayed-branch Attempt to fill delay slots of branch instructions.
-fdelete-dead-exceptions Delete dead instructions that may throw exceptions.
-fdelete-null-pointer-checks Delete useless null pointer checks.
-fdevirtualize Try to convert virtual calls to direct ones.
-fdevirtualize-speculatively Perform speculative devirtualization.
-fdse Use the RTL dead store elimination pass.
-fearly-inlining Perform early inlining.
-fexceptions Enable exception handling.
-fexcess-precision=[fast|standard|16] Specify handling of excess floating-point precision.
-fexpensive-optimizations Perform a number of minor, expensive optimizations.
-ffast-math This option lacks documentation.
-ffinite-loops Assume that loops with an exit will terminate and not loop indefinitely.
-ffinite-math-only Assume no NaNs or infinities are generated.
-ffloat-store Don't allocate floats and doubles in extended-precision registers.
-ffold-simple-inlines Fold calls to simple inline functions.
-fforward-propagate Perform a forward propagation pass on RTL.
-ffp-contract=[off|on|fast] Perform floating-point expression contraction.
-ffp-int-builtin-inexact Allow built-in functions ceil, floor, round, trunc to raise "inexact" exceptions.
-ffunction-cse Allow function addresses to be held in registers.
-fgcse Perform global common subexpression elimination.
-fgcse-after-reload Perform global common subexpression elimination after register allocation has finished.
-fgcse-las Perform redundant load after store elimination in global common subexpression elimination.
-fgcse-lm Perform enhanced load motion during global common subexpression elimination.
-fgcse-sm Perform store motion after global common subexpression elimination.
-fgraphite Enable in and out of Graphite representation.
-fgraphite-identity Enable Graphite Identity transformation.
-fguess-branch-probability Enable guessing of branch probabilities.
-fhandle-exceptions Same as -fexceptions. Uses of this option are diagnosed.
-fharden-compares Harden conditionals not used in branches, checking reversed conditions.
-fharden-conditional-branches Harden conditional branches by checking reversed conditions.
-fhoist-adjacent-loads Enable hoisting adjacent loads to encourage generating conditional move instructions.
-fif-conversion Perform conversion of conditional jumps to branchless equivalents.
-fif-conversion2 Perform conversion of conditional jumps to conditional execution.
-findirect-inlining Perform indirect inlining.
-finline Enable inlining of function declared "inline", disabling disables all inlining.
-finline-atomics Inline __atomic operations when a lock free instruction sequence is available.
-finline-functions Integrate functions not declared "inline" into their callers when profitable.
-finline-functions-called-once Integrate functions only required by their single caller.
-finline-small-functions Integrate functions into their callers when code size is known not to grow.
-fipa-bit-cp Perform interprocedural bitwise constant propagation.
-fipa-cp Perform interprocedural constant propagation.
-fipa-cp-clone Perform cloning to make Interprocedural constant propagation stronger.
-fipa-icf Perform Identical Code Folding for functions and read-only variables.
-fipa-icf-functions Perform Identical Code Folding for functions.
-fipa-icf-variables Perform Identical Code Folding for variables.
-fipa-modref Perform interprocedural modref analysis.
-fipa-profile Perform interprocedural profile propagation.
-fipa-pta Perform interprocedural points-to analysis.
-fipa-pure-const Discover pure and const functions.
-fipa-ra Use caller save register across calls if possible.
-fipa-reference Discover read-only and non addressable static variables.
-fipa-reference-addressable Discover read-only, write-only and non-addressable static variables.
-fipa-sra Perform interprocedural reduction of aggregates.
-fipa-stack-alignment Reduce stack alignment on call sites if possible.
-fipa-strict-aliasing Assume strict aliasing rules apply across (uninlined) function boundaries.
-fipa-vrp Perform IPA Value Range Propagation.
-fira-algorithm=[CB|priority] Set the used IRA algorithm.
-fira-hoist-pressure Use IRA based register pressure calculation in RTL hoist optimizations.
-fira-loop-pressure Use IRA based register pressure calculation in RTL loop optimizations.
-fira-region=[one|all|mixed] Set regions for IRA.
-fira-share-save-slots Share slots for saving different hard registers.
-fira-share-spill-slots Share stack slots for spilled pseudo-registers.
-fisolate-erroneous-paths-attribute Detect paths that trigger erroneous or undefined behavior due to a null value being used in a way forbidden by a returns_nonnull or nonnull attribute. Isolate those paths from the main control
flow and turn the statement with erroneous or undefined behavior into a trap.
-fisolate-erroneous-paths-dereference Detect paths that trigger erroneous or undefined behavior due to dereferencing a null pointer. Isolate those paths from the main control flow and turn the statement with erroneous or undefined
behavior into a trap.
-fivopts Optimize induction variables on trees.
-fjump-tables Use jump tables for sufficiently large switch statements.
-fkeep-gc-roots-live This option lacks documentation.
-flifetime-dse Tell DSE that the storage for a C++ object is dead when the constructor starts and when the destructor finishes.
-flifetime-dse=<0,2> This option lacks documentation.
-flimit-function-alignment This option lacks documentation.
-flive-patching Same as -flive-patching=inline-clone.
-flive-patching=[inline-only-static|inline-clone] Control IPA optimizations to provide a safe compilation for live-patching. At the same time, provides multiple-level control on the enabled IPA optimizations.
-flive-range-shrinkage Relief of register pressure through live range shrinkage.
-floop-interchange Enable loop interchange on trees.
-floop-nest-optimize Enable the loop nest optimizer.
-floop-parallelize-all Mark all loops as parallel.
-floop-unroll-and-jam Perform unroll-and-jam on loops.
-flra-remat Do CFG-sensitive rematerialization in LRA.
-fmath-errno Set errno after built-in math functions.
-fmodulo-sched Perform SMS based modulo scheduling before the first scheduling pass.
-fmodulo-sched-allow-regmoves Perform SMS based modulo scheduling with register moves allowed.
-fmove-loop-invariants Move loop invariant computations out of loops.
-fmove-loop-stores Move stores out of loops.
-fnon-call-exceptions Support synchronous non-call exceptions.
-fnothrow-opt Treat a throw() exception specification as noexcept to improve code size.
-fomit-frame-pointer When possible do not generate stack frames.
-fopt-info Enable all optimization info dumps on stderr.
-foptimize-sibling-calls Optimize sibling and tail recursive calls.
-foptimize-strlen Enable string length optimizations on trees.
-fpack-struct Pack structure members together without holes.
-fpack-struct=<number> Set initial maximum structure member alignment.
-fpartial-inlining Perform partial inlining.
-fpatchable-function-entry= Insert NOP instructions at each function entry.
-fpeel-loops Perform loop peeling.
-fpeephole Enable machine specific peephole optimizations.
-fpeephole2 Enable an RTL peephole pass before sched2.
-fplt Use PLT for PIC calls (-fno-plt: load the address from GOT at call site).
-fpredictive-commoning Run predictive commoning optimization.
-fprefetch-loop-arrays Generate prefetch instructions, if available, for arrays in loops.
-fprintf-return-value Treat known sprintf return values as constants.
-fprofile-partial-training Do not assume that functions never executed during the train run are cold.
-fprofile-reorder-functions Enable function reordering that improves code placement.
-freciprocal-math Same as -fassociative-math for expressions which include division.
-free Turn on Redundant Extensions Elimination pass.
-freg-struct-return Return small aggregates in registers.
-frename-registers Perform a register renaming optimization pass.
-freorder-blocks Reorder basic blocks to improve code placement.
-freorder-blocks-algorithm=[simple|stc] Set the used basic block reordering algorithm.
-freorder-blocks-and-partition Reorder basic blocks and partition into hot and cold sections.
-freorder-functions Reorder functions to improve code placement.
-frerun-cse-after-loop Add a common subexpression elimination pass after loop optimizations.
-freschedule-modulo-scheduled-loops Enable/Disable the traditional scheduling in loops that already passed modulo scheduling.
-frounding-math Disable optimizations that assume default FP rounding behavior.
-frtti Generate run time type descriptor information.
-fsave-optimization-record Write a SRCFILE.opt-record.json file detailing what optimizations were performed.
-fsched-critical-path-heuristic Enable the critical path heuristic in the scheduler.
-fsched-dep-count-heuristic Enable the dependent count heuristic in the scheduler.
-fsched-group-heuristic Enable the group heuristic in the scheduler.
-fsched-interblock Enable scheduling across basic blocks.
-fsched-last-insn-heuristic Enable the last instruction heuristic in the scheduler.
-fsched-pressure Enable register pressure sensitive insn scheduling.
-fsched-rank-heuristic Enable the rank heuristic in the scheduler.
-fsched-spec Allow speculative motion of non-loads.
-fsched-spec-insn-heuristic Enable the speculative instruction heuristic in the scheduler.
-fsched-spec-load Allow speculative motion of some loads.
-fsched-spec-load-dangerous Allow speculative motion of more loads.
-fsched-stalled-insns Allow premature scheduling of queued insns.
-fsched-stalled-insns-dep Set dependence distance checking in premature scheduling of queued insns.
-fsched-stalled-insns-dep=<number> Set dependence distance checking in premature scheduling of queued insns.
-fsched-stalled-insns=<number> Set number of queued insns that can be prematurely scheduled.
-fsched2-use-superblocks If scheduling post reload, do superblock scheduling.
-fschedule-fusion Perform a target dependent instruction fusion optimization pass.
-fschedule-insns Reschedule instructions before register allocation.
-fschedule-insns2 Reschedule instructions after register allocation.
-fsection-anchors Access data in the same section from shared anchor points.
-fsel-sched-pipelining Perform software pipelining of inner loops during selective scheduling.
-fsel-sched-pipelining-outer-loops Perform software pipelining of outer loops during selective scheduling.
-fsel-sched-reschedule-pipelined Reschedule pipelined regions without pipelining.
-fselective-scheduling Schedule instructions using selective scheduling algorithm.
-fselective-scheduling2 Run selective scheduling after reload.
-fsemantic-interposition Allow interposing function (or variables) by ones with different semantics (or initializer) respectively by dynamic linker.
-fshort-enums Use the narrowest integer type possible for enumeration types.
-fshort-wchar Force the underlying type for "wchar_t" to be "unsigned short".
-fshrink-wrap Emit function prologues only before parts of the function that need it, rather than at the top of the function.
-fshrink-wrap-separate Shrink-wrap parts of the prologue and epilogue separately.
-fsignaling-nans Disable optimizations observable by IEEE signaling NaNs.
-fsigned-zeros Disable floating point optimizations that ignore the IEEE signedness of zero.
-fsimd-cost-model=[unlimited|dynamic|cheap|very-cheap] Specifies the vectorization cost model for code marked with a simd directive.
-fsingle-precision-constant Convert floating point constants to single precision constants.
-fsplit-ivs-in-unroller Split lifetimes of induction variables when loops are unrolled.
-fsplit-loops Perform loop splitting.
-fsplit-paths Split paths leading to loop backedges.
-fsplit-wide-types Split wide types into independent registers.
-fsplit-wide-types-early Split wide types into independent registers earlier.
-fssa-backprop Enable backward propagation of use properties at the SSA level.
-fssa-phiopt Optimize conditional patterns using SSA PHI nodes.
-fstack-check=[no|generic|specific] Insert stack checking code into the program.
-fstack-clash-protection Insert code to probe each page of stack space as it is allocated to protect from stack-clash style attacks.
-fstack-protector Use propolice as a stack protection method.
-fstack-protector-all Use a stack protection method for every function.
-fstack-protector-explicit Use stack protection method only for functions with the stack_protect attribute.
-fstack-protector-strong Use a smart stack protection method for certain functions.
-fstack-reuse=[all|named_vars|none] Set stack reuse level for local variables.
-fstdarg-opt Optimize amount of stdarg registers saved to stack at start of function.
-fstore-merging Merge adjacent stores.
-fstrict-aliasing Assume strict aliasing rules apply.
-fstrict-enums Assume that values of enumeration type are always within the minimum range of that type.
-fstrict-volatile-bitfields Force bitfield accesses to match their type width.
-fthread-jumps Perform jump threading optimizations.
-fno-threadsafe-statics Do not generate thread-safe code for initializing local statics.
-ftoplevel-reorder Reorder top level functions, variables, and asms.
-ftracer Perform superblock formation via tail duplication.
-ftrapping-math Assume floating-point operations can trap.
-ftrapv Trap for signed overflow in addition, subtraction and multiplication.
-ftree-bit-ccp Enable SSA-BIT-CCP optimization on trees.
-ftree-builtin-call-dce Enable conditional dead code elimination for builtin calls.
-ftree-ccp Enable SSA-CCP optimization on trees.
-ftree-ch Enable loop header copying on trees.
-ftree-coalesce-vars Enable SSA coalescing of user variables.
-ftree-copy-prop Enable copy propagation on trees.
-ftree-cselim Transform condition stores into unconditional ones.
-ftree-dce Enable SSA dead code elimination optimization on trees.
-ftree-dominator-opts Enable dominator optimizations.
-ftree-dse Enable dead store elimination.
-ftree-forwprop Enable forward propagation on trees.
-ftree-fre Enable Full Redundancy Elimination (FRE) on trees.
-ftree-loop-distribute-patterns Enable loop distribution for patterns transformed into a library call.
-ftree-loop-distribution Enable loop distribution on trees.
-ftree-loop-if-convert Convert conditional jumps in innermost loops to branchless equivalents.
-ftree-loop-im Enable loop invariant motion on trees.
-ftree-loop-ivcanon Create canonical induction variables in loops.
-ftree-loop-optimize Enable loop optimizations on tree level.
-ftree-loop-vectorize Enable loop vectorization on trees.
-ftree-lrs Perform live range splitting during the SSA->normal pass.
-ftree-parallelize-loops=<number> Enable automatic parallelization of loops.
-ftree-partial-pre In SSA-PRE optimization on trees, enable partial-partial redundancy elimination.
-ftree-phiprop Enable hoisting loads from conditional pointers.
-ftree-pre Enable SSA-PRE optimization on trees.
-ftree-pta Perform function-local points-to analysis on trees.
-ftree-reassoc Enable reassociation on tree level.
-ftree-scev-cprop Enable copy propagation of scalar-evolution information.
-ftree-sink Enable SSA code sinking on trees.
-ftree-slp-vectorize Enable basic block vectorization (SLP) on trees.
-ftree-slsr Perform straight-line strength reduction.
-ftree-sra Perform scalar replacement of aggregates.
-ftree-switch-conversion Perform conversions of switch initializations.
-ftree-tail-merge Enable tail merging on trees.
-ftree-ter Replace temporary expressions in the SSA->normal pass.
-ftree-vectorize Enable vectorization on trees.
-ftree-vrp Perform Value Range Propagation on trees.
-ftrivial-auto-var-init=[uninitialized|pattern|zero] Add initializations to automatic variables.
-funconstrained-commons Assume common declarations may be overridden with ones with a larger trailing array.
-funroll-all-loops Perform loop unrolling for all loops.
-funroll-completely-grow-size This option lacks documentation.
-funroll-loops Perform loop unrolling when iteration count is known.
-funsafe-math-optimizations Allow math optimizations that may violate IEEE or ISO standards.
-funswitch-loops Perform loop unswitching.
-funwind-tables Just generate unwind tables for exception handling.
-fvar-tracking Perform variable tracking.
-fvar-tracking-assignments Perform variable tracking by annotating assignments.
-fvar-tracking-assignments-toggle Toggle -fvar-tracking-assignments.
-fvar-tracking-uninit Perform variable tracking and also tag variables that are uninitialized.
-fvariable-expansion-in-unroller Apply variable expansion when loops are unrolled.
-fvect-cost-model=[unlimited|dynamic|cheap|very-cheap] Specifies the cost model for vectorization.
-fversion-loops-for-strides Version loops based on whether indices have a stride of one.
-fvpt Use expression value profiles in optimizations.
-fweb Construct webs and split unrelated uses of single variable.
-fwrapv Assume signed arithmetic overflow wraps around.
-fwrapv-pointer Assume pointer overflow wraps around.
-gstatement-frontiers Emit progressive recommended breakpoint locations.
gcc --target-help
oscam@build:~$ gcc --target-help
The following options are target specific:
-m128bit-long-double sizeof(long double) is 16.
-m16 Generate 16bit i386 code.
-m32 Generate 32bit i386 code.
-m3dnow Support 3DNow! built-in functions.
-m3dnowa Support Athlon 3Dnow! built-in functions.
-m64 Generate 64bit x86-64 code.
-m80387 Use hardware fp.
-m8bit-idiv Expand 32bit/64bit integer divide into 8bit
unsigned integer divide with run-time check.
-m96bit-long-double sizeof(long double) is 12.
-mabi= Generate code that conforms to the given ABI.
-mabm Support code generation of Advanced Bit
Manipulation (ABM) instructions.
-maccumulate-outgoing-args Reserve space for outgoing arguments in the
function prologue.
-maddress-mode= Use given address mode.
-madx Support flag-preserving add-carry instructions.
-maes Support AES built-in functions and code
generation.
-malign-data= Use the given data alignment.
-malign-double Align some doubles on dword boundary.
-malign-functions= Function starts are aligned to this power of 2.
-malign-jumps= Jump targets are aligned to this power of 2.
-malign-loops= Loop code aligned to this power of 2.
-malign-stringops Align destination of the string operations.
-mandroid Generate code for the Android platform.
-march= Generate code for given CPU.
-masm= Use given assembler dialect.
-mavx Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2 and AVX built-in functions and code
generation.
-mavx2 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX and AVX2 built-in functions and code
generation.
-mavx256-split-unaligned-load Split 32-byte AVX unaligned load.
-mavx256-split-unaligned-store Split 32-byte AVX unaligned store.
-mavx5124fmaps Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-
in functions and code generation.
-mavx5124vnniw Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-
in functions and code generation.
-mavx512bf16 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2, AVX512F and AVX512BF16 built-
in functions and code generation.
-mavx512bitalg Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2, AVX512F and AVX512BITALG built-
in functions and code generation.
-mavx512bw Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-
in functions and code generation.
-mavx512cd Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-
in functions and code generation.
-mavx512dq Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-
in functions and code generation.
-mavx512er Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-
in functions and code generation.
-mavx512f Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F built-in functions
and code generation.
-mavx512ifma Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA
built-in functions and code generation.
-mavx512pf Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-
in functions and code generation.
-mavx512vbmi Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI
built-in functions and code generation.
-mavx512vbmi2 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-
in functions and code generation.
-mavx512vl Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-
in functions and code generation.
-mavx512vnni Support AVX512VNNI built-in functions and code
generation.
-mavx512vp2intersect Support AVX512VP2INTERSECT built-in functions and
code generation.
-mavx512vpopcntdq Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ
built-in functions and code generation.
-mbionic Use Bionic C library.
-mbmi Support BMI built-in functions and code
generation.
-mbmi2 Support BMI2 built-in functions and code
generation.
-mbranch-cost=<0,5> Branches are this expensive (arbitrary units).
-mcall-ms2sysv-xlogues Use libgcc stubs to save and restore registers
clobbered by 64-bit Microsoft to System V ABI
calls.
-mcld Generate cld instruction in the function prologue.
-mcldemote Support CLDEMOTE built-in functions and code
generation.
-mclflushopt Support CLFLUSHOPT instructions.
-mclwb Support CLWB instruction.
-mclzero Support CLZERO built-in functions and code
generation.
-mcmodel= Use given x86-64 code model.
-mcrc32 Support code generation of crc32 instruction.
-mcx16 Support code generation of cmpxchg16b instruction.
-mdispatch-scheduler Do dispatch scheduling if processor is bdver1,
bdver2, bdver3, bdver4 or znver1 and Haifa
scheduling is selected.
-menqcmd Support ENQCMD built-in functions and code
generation.
-mf16c Support F16C built-in functions and code
generation.
-mfancy-math-387 Generate sin, cos, sqrt for FPU.
-mfentry Emit profiling counter call at function entry
before prologue.
-mfentry-name= Set name of __fentry__ symbol called at function
entry.
-mfentry-section= Set name of section to record mrecord-mcount
calls.
-mfma Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1,
SSE4.2, AVX and FMA built-in functions and code
generation.
-mfma4 Support FMA4 built-in functions and code
generation.
-mforce-drap Always use Dynamic Realigned Argument Pointer
(DRAP) to realign stack.
-mforce-indirect-call Make all function calls indirect.
-mfp-ret-in-387 Return values of functions in FPU registers.
-mfpmath= Generate floating point mathematics using given
instruction set.
-mfsgsbase Support FSGSBASE built-in functions and code
generation.
-mfunction-return= Convert function return to call and return thunk.
-mfxsr Support FXSAVE and FXRSTOR instructions.
-mgeneral-regs-only Generate code which uses only the general
registers.
-mgfni Support GFNI built-in functions and code
generation.
-mglibc Use GNU C library.
-mhard-float Use hardware fp.
-mhle Support Hardware Lock Elision prefixes.
-miamcu Generate code that conforms to Intel MCU psABI.
-mieee-fp Use IEEE math for fp comparisons.
-mincoming-stack-boundary= Assume incoming stack aligned to this power of 2.
-mindirect-branch-register Force indirect call and jump via register.
-mindirect-branch= Convert indirect call and jump to call and return
thunks.
-minline-all-stringops Inline all known string operations.
-minline-stringops-dynamically Inline memset/memcpy string operations, but
perform inline version only for small blocks.
-minstrument-return= Instrument function exit in instrumented
functions with __fentry__.
-mlarge-data-threshold=<number> Data greater than given threshold will go
into .ldata section in x86-64 medium model.
-mlong-double-128 Use 128-bit long double.
-mlong-double-64 Use 64-bit long double.
-mlong-double-80 Use 80-bit long double.
-mlwp Support LWP built-in functions and code
generation.
-mlzcnt Support LZCNT built-in function and code
generation.
-mmanual-endbr Insert ENDBR instruction at function entry only
via cf_check attribute for CET instrumentation.
-mmemcpy-strategy= Specify memcpy expansion strategy when expected
size is known.
-mmemset-strategy= Specify memset expansion strategy when expected
size is known.
-mmmx Support MMX built-in functions.
-mmovbe Support code generation of movbe instruction.
-mmovdir64b Support MOVDIR64B built-in functions and code
generation.
-mmovdiri Support MOVDIRI built-in functions and code
generation.
-mmpx Removed in GCC 9. This switch has no effect.
-mms-bitfields Use native (MS) bitfield layout.
-mmusl Use musl C library.
-mmwaitx Support MWAITX and MONITORX built-in functions
and code generation.
-mno-default Clear all tune features.
-mno-sse4 Do not support SSE4.1 and SSE4.2 built-in
functions and code generation.
-mnop-mcount Generate mcount/__fentry__ calls as nops. To
activate they need to be patched in.
-momit-leaf-frame-pointer Omit the frame pointer in leaf functions.
-mpc32 Set 80387 floating-point precision to 32-bit.
-mpc64 Set 80387 floating-point precision to 64-bit.
-mpc80 Set 80387 floating-point precision to 80-bit.
-mpclmul Support PCLMUL built-in functions and code
generation.
-mpconfig Support PCONFIG built-in functions and code
generation.
-mpku Support PKU built-in functions and code
generation.
-mpopcnt Support code generation of popcnt instruction.
-mprefer-avx128 Use 128-bit AVX instructions instead of 256-bit
AVX instructions in the auto-vectorizer. Same as
-mprefer-vector-width=.
-mprefer-vector-width= Use given register vector width instructions
instead of maximum register width in the auto-
vectorizer.
-mpreferred-stack-boundary= Attempt to keep stack aligned to this power of 2.
-mprefetchwt1 Support PREFETCHWT1 built-in functions and code
generation.
-mprfchw Support PREFETCHW instruction.
-mptwrite Support PTWRITE built-in functions and code
generation.
-mpush-args Use push instructions to save outgoing arguments.
-mrdpid Support RDPID built-in functions and code
generation.
-mrdrnd Support RDRND built-in functions and code
generation.
-mrdseed Support RDSEED instruction.
-mrecip Generate reciprocals instead of divss and sqrtss.
-mrecip= Control generation of reciprocal estimates.
-mrecord-mcount Generate __mcount_loc section with all mcount or
__fentry__ calls.
-mrecord-return Generate a __return_loc section pointing to all
return instrumentation code.
-mred-zone Use red-zone in the x86-64 code.
-mregparm= Number of registers used to pass integer
arguments.
-mrtd Alternate calling convention.
-mrtm Support RTM built-in functions and code
generation.
-msahf Support code generation of sahf instruction in
64bit x86-64 code.
-msgx Support SGX built-in functions and code
generation.
-msha Support SHA1 and SHA256 built-in functions and
code generation.
-mshstk Enable shadow stack built-in functions from
Control-flow Enforcement Technology (CET).
-mskip-rax-setup Skip setting up RAX register when passing
variable arguments.
-msoft-float Do not use hardware fp.
-msse Support MMX and SSE built-in functions and code
generation.
-msse2 Support MMX, SSE and SSE2 built-in functions and
code generation.
-msse2avx Encode SSE instructions with VEX prefix.
-msse3 Support MMX, SSE, SSE2 and SSE3 built-in
functions and code generation.
-msse4 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and
SSE4.2 built-in functions and code generation.
-msse4.1 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1
built-in functions and code generation.
-msse4.2 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and
SSE4.2 built-in functions and code generation.
-msse4a Support MMX, SSE, SSE2, SSE3 and SSE4A built-in
functions and code generation.
-msseregparm Use SSE register passing conventions for SF and
DF mode.
-mssse3 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in
functions and code generation.
-mstack-arg-probe Enable stack probing.
-mstack-protector-guard-offset= Use the given offset for addressing the stack-
protector guard.
-mstack-protector-guard-reg= Use the given base register for addressing the
stack-protector guard.
-mstack-protector-guard-symbol= Use the given symbol for addressing the stack-
protector guard.
-mstack-protector-guard= Use given stack-protector guard.
-mstackrealign Realign stack in prologue.
-mstringop-strategy= Chose strategy to generate stringop using.
-mstv Disable Scalar to Vector optimization pass
transforming 64-bit integer computations into a
vector ones.
-mtbm Support TBM built-in functions and code
generation.
-mtls-dialect= Use given thread-local storage dialect.
-mtls-direct-seg-refs Use direct references against %gs when accessing
tls data.
-mtune-ctrl= Fine grain control of tune features.
-mtune= Schedule code for given CPU.
-muclibc Use uClibc C library.
-mvaes Support VAES built-in functions and code
generation.
-mveclibabi= Vector library ABI to use.
-mvect8-ret-in-mem Return 8-byte vectors in memory.
-mvpclmulqdq Support VPCLMULQDQ built-in functions and code
generation.
-mvzeroupper Generate vzeroupper instruction before a transfer
of control flow out of the function.
-mwaitpkg Support WAITPKG built-in functions and code
generation.
-mwbnoinvd Support WBNOINVD built-in functions and code
generation.
-mx32 Generate 32bit x86-64 code.
-mxop Support XOP built-in functions and code
generation.
-mxsave Support XSAVE and XRSTOR instructions.
-mxsavec Support XSAVEC instructions.
-mxsaveopt Support XSAVEOPT instruction.
-mxsaves Support XSAVES and XRSTORS instructions.
GEKÜRZT
This makes binaries non-deterministic
--add-stdcall-alias Export symbols with and without @nn
--disable-stdcall-fixup Don't link _sym to _sym@nn
--enable-stdcall-fixup Link _sym to _sym@nn without warnings
--exclude-symbols sym,sym,... Exclude symbols from automatic export
--exclude-all-symbols Exclude all symbols from automatic export
--exclude-libs lib,lib,... Exclude libraries from automatic export
--exclude-modules-for-implib mod,mod,...
Exclude objects, archive members from auto
export, place into import library instead
--export-all-symbols Automatically export all globals to DLL
--kill-at Remove @nn from exported symbols
--output-def <file> Generate a .DEF file for the built DLL
--warn-duplicate-exports Warn about duplicate exports
--compat-implib Create backward compatible import libs;
create __imp_<SYMBOL> as well
--enable-auto-image-base Automatically choose image base for DLLs
unless user specifies one
--disable-auto-image-base Do not auto-choose image base (default)
--dll-search-prefix=<string> When linking dynamically to a dll without
an importlib, use <string><basename>.dll
in preference to lib<basename>.dll
--enable-auto-import Do sophisticated linking of _sym to
__imp_sym for DATA references
--disable-auto-import Do not auto-import DATA items from DLLs
--enable-runtime-pseudo-reloc Work around auto-import limitations by
adding pseudo-relocations resolved at
runtime
--disable-runtime-pseudo-reloc Do not add runtime pseudo-relocations for
auto-imported DATA
--enable-extra-pep-debug Enable verbose debug output when building
or linking to DLLs (esp. auto-import)
--enable-long-section-names Use long COFF section names even in
executable image files
--disable-long-section-names Never use long COFF section names, even
in object files
--high-entropy-va Image is compatible with 64-bit address space
layout randomization (ASLR)
--dynamicbase Image base address may be relocated using
address space layout randomization (ASLR)
--enable-reloc-section Create the base relocation table
--forceinteg Code integrity checks are enforced
--nxcompat Image is compatible with data execution prevention
--no-isolation Image understands isolation but do not isolate the image
--no-seh Image does not use SEH; no SE handler may
be called in this image
--no-bind Do not bind this image
--wdmdriver Driver uses the WDM model
--tsaware Image is Terminal Server aware
--build-id[=STYLE] Generate build ID
i386pe:
--base_file <basefile> Generate a base file for relocatable DLLs
--dll Set image base to the default for DLLs
--file-alignment <size> Set file alignment
--heap <size> Set initial size of the heap
--image-base <address> Set start address of the executable
--major-image-version <number> Set version number of the executable
--major-os-version <number> Set minimum required OS version
--major-subsystem-version <number> Set minimum required OS subsystem version
--minor-image-version <number> Set revision number of the executable
--minor-os-version <number> Set minimum required OS revision
--minor-subsystem-version <number> Set minimum required OS subsystem revision
--section-alignment <size> Set section alignment
--stack <size> Set size of the initial stack
--subsystem <name>[:<version>] Set required OS subsystem [& version]
--support-old-code Support interworking with old code
--[no-]leading-underscore Set explicit symbol underscore prefix mode
--thumb-entry=<symbol> Set the entry point to be Thumb <symbol>
--[no-]insert-timestamp Use a real timestamp rather than zero (default).
This makes binaries non-deterministic
--add-stdcall-alias Export symbols with and without @nn
--disable-stdcall-fixup Don't link _sym to _sym@nn
--enable-stdcall-fixup Link _sym to _sym@nn without warnings
--exclude-symbols sym,sym,... Exclude symbols from automatic export
--exclude-all-symbols Exclude all symbols from automatic export
--exclude-libs lib,lib,... Exclude libraries from automatic export
--exclude-modules-for-implib mod,mod,...
Exclude objects, archive members from auto
export, place into import library instead.
--export-all-symbols Automatically export all globals to DLL
--kill-at Remove @nn from exported symbols
--output-def <file> Generate a .DEF file for the built DLL
--warn-duplicate-exports Warn about duplicate exports
--compat-implib Create backward compatible import libs;
create __imp_<SYMBOL> as well.
--enable-auto-image-base[=<address>] Automatically choose image base for DLLs
(optionally starting with address) unless
specifically set with --image-base
--disable-auto-image-base Do not auto-choose image base. (default)
--dll-search-prefix=<string> When linking dynamically to a dll without
an importlib, use <string><basename>.dll
in preference to lib<basename>.dll
--enable-auto-import Do sophisticated linking of _sym to
__imp_sym for DATA references
--disable-auto-import Do not auto-import DATA items from DLLs
--enable-runtime-pseudo-reloc Work around auto-import limitations by
adding pseudo-relocations resolved at
runtime.
--disable-runtime-pseudo-reloc Do not add runtime pseudo-relocations for
auto-imported DATA.
--enable-extra-pe-debug Enable verbose debug output when building
or linking to DLLs (esp. auto-import)
--large-address-aware Executable supports virtual addresses
greater than 2 gigabytes
--disable-large-address-aware Executable does not support virtual
addresses greater than 2 gigabytes
--enable-long-section-names Use long COFF section names even in
executable image files
--disable-long-section-names Never use long COFF section names, even
in object files
--dynamicbase Image base address may be relocated using
address space layout randomization (ASLR)
--enable-reloc-section Create the base relocation table
--forceinteg Code integrity checks are enforced
--nxcompat Image is compatible with data execution prevention
--no-isolation Image understands isolation but do not isolate the image
--no-seh Image does not use SEH. No SE handler may
be called in this image
--no-bind Do not bind this image
--wdmdriver Driver uses the WDM model
--tsaware Image is Terminal Server aware
--build-id[=STYLE] Generate build ID
module-emulator-streamserver.c: In function 'stream_client_handler':
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
csakeyA[0] = keydata->pvu_csa_ks[PVU_CW_A1 + j];
~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:813:39: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
csakeyA[k] = keydata->pvu_csa_ks[PVU_CW_A1 + k];
~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:798:40: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
deskey = keydata->pvu_des_ks[PVU_CW_A1 + j][oddKeyUsed];
^~~~~~~
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
module-emulator-streamserver.c:840:16: warning: array subscript is above array bounds [-Warray-bounds]
Folge dem Video um zu sehen, wie unsere Website als Web-App auf dem Startbildschirm installiert werden kann.
Anmerkung: Diese Funktion ist in einigen Browsern möglicherweise nicht verfügbar.
Das Digital Eliteboard ist ein kostenloses Forum und ist auf Spenden angewiesen, um sich auch in Zukunft selbst zu finanzieren. Wenn auch du mit dem Digital Eliteboard zufrieden bist, würden wir uns über jede Unterstützung freuen.
Hier kannst du uns unterstützen SPENDEN