here is some data from march 10th drivers
--..%02x......Error: Failed to enable FPGA array......FPGA array is not enabled.......FPGA array is programmed and enabled....FPGA Array Encryption is enforced. Plain text programming and verification is prohibited....FPGA Array Encryption is not enforced.......Cannot gaurantee valid AES key present in target device.....Unable to proceed with Encrypted FPGA Array operation.......FPGA Array Verification is protected by pass key....A valid pass key needs to be provided.......FPGA Array Write/Erase is protected by pass key.....FlashROM Encryption is enforced. Plain text programming and verification is prohibited......FlashROM Encryption is not enforced.....Unable to proceed with Encrypted FlashROM programming.......FROM Verification is protected by pass key......FROM Write/Erase is protected by pass key.......NVM block 0 Encryption is enforced. Plain text programming is prohibited....NVM block 0 Encryption is not enforced......Unable to proceed with Encrypted NVM programming....NVM block 0 Read is protected by pass key.......NVM block 0 write is protected by pass key......NVM block 1 Encryption is enforced. Plain text programming is prohibited....NVM block 1 Encryption is not enforced......NVM block 1 Read is protected by pass key.......NVM block 1 write is protected by pass key......NVM block 2 Encryption is enforced. Plain text programming is prohibited....NVM block 2 Encryption is not enforced......NVM block 2 Read is protected by pass key.......NVM block 2 write is protected by pass key......NVM block 3 Encryption is enforced. Plain text programming is prohibited....NVM block 3 Encryption is not enforced......NVM block 3 Read is protected by pass key.......NVM block 3 Write is protected by pass key......Error, pass key match failure.......Security Setting : .....FlashROM Write/Erase protected by pass key......FlashROM Read protected by pass key.....Array Write/Erase protected by pass key.....Array Verify protected by pass key......Encrypted FlashROM Programming Enabled......Encrypted FPGA Array Programming Enabled....NVM block 0 Write protected by pass key.....NVM block 0 Read protected by pass key......NVM block 1 Write protected by pass key.....NVM block 1 Read protected by pass key......Encrypted NVM block 0 Programming Enabled.......Encrypted NVM block 1 Programming Enabled.......==================================== ==============......User Error: Action not found........User Error: Data file does not contain the data needed to support requested action. Check original STAPL file configuration....User Error: Compiled code does not support the requesed action. Re-compile the code with the arropriate compile option enabled.........Programming UROW........USER_UROW = ....Failed Erase Operation......Failed UROW programming.....User information: ......CYCLE COUNT: ...CHECKSUM = .....Design Name = ......Programming Method: ..IEEE1532....STAPL...DIRECTC.PDB.SVF.IAP.Unknown. ..Algorithm Version: = ...Programmer: = ......Programmer: ..Flash Pro...Flash Pro Lite..FP3.Sculptor....BP Programmer...DirectC.FP4...Software Version = .....Expected SILSIG: ...IDCODE: ....ActID = .. ExpID = .....Device Rev = ...FSN: ...Erase.......Verifying device info.......User LOCK Setting Error...Security......UROW Setting Error...Checksum...UROW Setting Error...Design.....Setting BSR Configurations......Loading BSR.........Initializing Target Device......Action not found........Warning: If you are programming a calibrated device, please regenerate the analog system configuration file with Libero 8.2 SP1 or greater......Hardware interface is not selected. Please assign hardware_interface to either IAP_SEL or GPIO_SEL prior to calling dp_top.....ENABLE_IAP_SUPPORT compile switch must be enabled to perform IAP programming....Failed to authenticate the encrypted data.......Programming Rlock.......Programming RLOCK.......Failed to program RLOCK ....Performing Data Authentication..........Programming FPGA Array......Failed to program FPGA Array at row ....Verify 0 failed..Row Number : ......Verify 1 failed..Row Number : ......Verifying FPGA Array........Erase FPGA Array..........FlashROM Information: ........========================================== ========......Programming FlashROM........Verifying FlashROM......Erase FlashROM......Error: Page buffer size is not big enough.......Error: This action is not supported with security programming enabled in the data file......Error: This action is not supported in this revision of the silicon.....Failed to access Embedded Flash Memory. ..nvmBusy: .....nvmAccess: .....Program System Init and Boot Clients........Programming NVM block ..........Embedded Flash Memory Block (EFMB) failure......Error programming Embedded Flash Memory Block (EFMB)....WARNING: Write count threshold exceeded. ...Embedded Flash Memory Block (EFMB) MAC failure......Checking for Calibration data... ...Device is calibrated........Calibration overlap detected........Verify System Init and Boot Clients.........Verifying NVM block ....WARNING: Write count threshold exceeded. Page ...., Block .....Failed to verify AES Sec........Single Key Device Detected......Error: Data file is compiled for Dual Key Device........Dual Key Device Detected........Error: Data file is compiled for Single Key Device......P1 Device Detected......Error: P1 Device Detected. Data file is not compiled for P1 Device......Error: P1 Device is not Detected. Data file is compiled for P1 Device.......M1 Device Detected......Error: M1 Device Detected. Data file is not compiled for M1 Device......Error: M1 Device is not Detected. Data file is compiled for M1 Device.......M7 Device Detected......Error: M7 Device Detected. Data file is not compiled for M7 Device......Error: M7 Device is not Detected. Data file is compiled for M7 Device.......Error: Core enabled device detected.........Checking for Dual Key Device........Programming SILSIG......Reading Security........Programming Security........Erase Security....<3>dp_user_init: misc_register returns %d...fpga_dp.<3>Err creating ci......fpga_dp device error....dp_display_value: 0x%x..dp_display_value: 0x%d..dp_display_value: %c....dp_display_text:%s..Performing..Checking.... Erase...Erasing.....Programming.Writing.....Verify ..Verifying...dp....Checking data CRC.......Expected CRC=...Data file is not loaded... .....Calculating actual CRC......CRC verification failed. Expected CRC = . Actual CRC = ........Data file is not valid. ../home/shcheong/work/stb/sw/7356/refsw/phase6.0/nexus/platforms/7356731/src/nexus_platform.c.platform....profile_init....NEXUS _Platform_Init./home/shcheong/work/stb/sw/7356/refsw/phase6.0/nexus/platforms/7356731/src/nexus_platform_config.c..hdmi_i2c_software_mode..B roadcom....STB Refsw Design....avd_monitor./home/shcheong/work/stb/sw/7356/refsw/phase6.0/nexus/platforms/7356731/src/nexus_platform_interrupt.c.../home/shcheong/work/stb/sw/7356/refsw/phase6.0/nexus/platforms/7356731/src/linuxkernel/nexus_map.c..nexus_binary_compat.audio_uart_file.a udio_debug_file....audio_core_file./home/shcheong/work/stb/sw/7356/refsw/phase6.0/nexus/platforms/7356731/src/nexus_platform_standby.c.%s %d.%d %s.7356731...../home/shcheong/work/stb/sw/7356/refsw/phase6.0/nexus/platforms/7356731/bin/syncthunk/nexus_platform_thunks.c..../bin/kill...-9..%u../home/shcheong/work/stb/sw/7356/refsw/phase6.0/nexus/platforms/7356731/src/linuxkernel/nexus
Das ist der Part der ganz böse ist:
FPGA Array Encryption is not enforced.......Cannot gaurantee valid AES key present in target device.....Unable to proceed with Encrypted FPGA Array operation.......FPGA Array Verification is protected by pass key....A valid pass key needs to be provided.......FPGA Array Write/Erase is protected by pass key.....FlashROM Encryption is enforced.